74LVT16373ADGG,112, Защелка, семейство LVT, 74LVT16373, Прозрачная D Типа, С Тремя Состояниями Неинвертирующий, TSSOP

The 74LVT16373ADGG is a 16-bit BiCMOS transparent D Latch designed with non-inverting 3-state bus compatible outputs for VCC operation at 3.3V. The device can be used as two 8-bit latches or one 16-bit latch. When enable (E) input is high, the Q outputs follow the data (D) inputs. When enable is taken low, the Q outputs are latched at the levels of the D inputs one setup time prior to the high-to-low transition.

• TTL Input and output switching levels
• Input and output interface capability to systems at 5V supply
• Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
• Live insertion/extraction permitted
• Power-up reset
• Power-up 3-State
• No bus current loading when output is tied to 5V bus
• Latch-up protection exceeds 500mA per JEDEC Std 17

Полупроводники - Микросхемы\Логика\Триггеры-защелки

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