74HCT175D,652, Триггер, дополнительный выход, положительный фронт, 74HCT175, D, 54 МГц, 25 мА, SOIC

The 74HCT175D is a quad positive-edge triggered D-type Flip-flop with individual data inputs (Dn) and complementary outputs (Qn and Qn\). The common clock and master reset (MR\) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the low-to-high clock transition will be stored in the flip-flop and appear at the Q output. A low on MR\ causes the flip-flops and outputs to be reset low. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

• Asynchronous master reset
• Complies with JEDEC standard no. 7A
• TTL Input levels

Полупроводники - Микросхемы\Логика\Триггеры

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